The present invention relates generally to a method for providing temperature compensation for measurement of a temperature sensitive parameter of semiconductor IC (integrated circuit) chips, and more particularly pertains to providing temperature compensation for a maximum frequency measurement (Fmax) and speed sort/categorization of semiconductor IC chips such as micro-processors.
During testing of a high-power 130 nm microprocessor product, the operational speeds of the microprocessor chip modules are measured, and the individual product chip modules are sorted and classified into several different sorts/categories, typically three sorts reflecting fast, medium and slow operating speed chips.
The microprocessor chip modules are water-cooled during the test measurements using a handler, which supports and cools the individual products during testing. At points during the test, the chip temperature (Tdtest) is frequently higher than the setpoint temperature of the handler. For some measurements and on a significant population of hardware tested, the chip temperature is higher than the customer's planned maximum operating temperature (Tmax).During pre-production tests, chips are at temperatures as high as 100 C (35 C above Tmax), and during production/manufacturing speed-sort tests, chips are often at temperatures as high as 80 C (15 C above Tmax). This temperature rise reduces the maximum operating speed (Fmax in gigahertz)of the part during test by as much as 3% for 15 C above Tmax. As a consequence, parts are measured and categorized/binned as slower than they would actually perform in the customer application environment at temperatures at or below Tmax.